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Hits 1.301 – 1.320 of 1.629
1301
Tipster Shogun System (Joint GE-CMU): MUC-4 Test Results and Analysis
Krupka, George
;
Jaco, Paul
;
Mauldin, Michael
...
In: DTIC (1992)
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1302
GE-CMU: Description of the Tipster/Shogun System as Used for MUC-4
Jacobs, Paul
;
Krupka, George
;
Rau, Lisa
...
In: DTIC (1992)
BASE
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1303
BBN PLUM: MUC-4 Test Results and Analysis
Weischedel, Ralph
;
Ayuso, Damaris
;
Boisen, Sean
...
In: DTIC (1992)
BASE
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1304
Development of a Spoken Language System
Austin, S.
;
Ayuso, D.
;
Barry, C.
...
In: DTIC AND NTIS (1992)
BASE
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1305
Natural Language Generation
Hovy, Eduard H.
In: DTIC AND NTIS (1992)
BASE
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1306
Overview of the Fourth Message Understanding Evaluation and Conference
Sundheim, Beth M.
In: DTIC AND NTIS (1992)
BASE
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1307
VHDL and Waves Descriptions for a Pseudo-Random Pattern Generator
Serafino, Karen M.
;
Dukes, Michael A.
In: DTIC AND NTIS (1992)
Abstract:
A VHDL model for a 32-bit linear feedback shift register is documented, along with a WAVES dataset that provides test vectors for it. The register operates with a leading-edge dual clock, an asynchronous reset, and control bits to enable shifting (to the right) and loading. Other inputs are a polynomial and a seed value; the output is a bit pattern. The feedback feature is controller by the polynomial. For each polynomial bit position with a value of '1', the value of the register corresponding to that is fed through feedback before being shifted. The WAVES dataset is used to generate input test vectors for the register, and to provide a utility to compare actual outputs to predicted outputs. There are three different architectures for the register: structural behavioral, and structural with multiple component instantiations produced by the VHDL generate statement. There are also two architectures for the test bench: one that uses the WAVES dataset, and one that produces input vectors internally. The WAVES test bench uses a built-in utility to check outputs from each of the three register architectures against each other, and the non-WAVES test bench does these checks internally.
Keyword:
*PATTERN GENERATORS
;
*PSEUDO RANDOM SYSTEMS
;
*VHDL
;
*VHDL(VHSIC HARDWARE DESCIPTION LANGUAGE)
;
ARCHITECTURE
;
BENCH TESTS
;
CLOCKS
;
COMPUTER SIMULATION
;
Computer Systems
;
CONTROL
;
FEEDBACK
;
LANGUAGE
;
LEADING EDGES
;
Linguistics
;
PATTERN MAKING
;
PE62204F
;
POLYNOMIALS
;
SELF CONTAINED
;
TEST EQUIPMENT
;
VLSI
;
WAVES
;
WAVES(WAVEFORM ANALYSIS SYSTEM)
;
WUWL60964018
URL:
http://www.dtic.mil/docs/citations/ADA247891
http://oai.dtic.mil/oai/oai?&verb=getRecord&metadataPrefix=html&identifier=ADA247891
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1308
An Evaluation Methodology for Natural Language Processing Systems
Neal, Jeannette G.
;
Feit, Elissa L.
;
Funke, Douglas J.
...
In: DTIC AND NTIS (1992)
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1309
Dialect intelligibility testing among Central Yambasa speech varieties
Harvey, Bradley S.
;
Harvey, Tammie M.
;
Grant, Caroline
. - : Société Internationale de Linguistique, 1992
BASE
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1310
Fundamental considerations in language testing
Bachman, Lyle F.
. - Oxford [u.a.] : Oxford Univ. Press, 1991
BLLDB
UB Frankfurt Linguistik
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1311
Cloze procedures and concordances : the advantages of discourse level authenticity in testing expectancy grammar
Butler, Jonathan
In:
System. - Amsterdam : Elsevier
19 (1991) 1-2, 29-38
BLLDB
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1312
Cloze su un problema di spesa/guadagno/ricavo
Belcastro, Lauredana
In:
Riflettere sulla lingua. - Firenze : La Nuova Italia
(1991), 289-299
BLLDB
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1313
Cloze e riflessione linguistica
Marello, Carla
In:
Riflettere sulla lingua. - Firenze : La Nuova Italia
(1991), 161-167
BLLDB
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1314
Can semantics be syntactic?
Jahren, Neal
In:
Epistemology and cognition. - Dordrecht [u.a.] : Kluwer Acad. Publ.
(1991), 155-174
BLLDB
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1315
Can semantics be syntactic?
Jahren, Neal
In:
Epistemology and cognition. - Dordrecht [u.a.] : Kluwer Acad. Publ.
(1991), 155-174
BLLDB
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1316
Robust Processing of Real-World Natural-Language Texts
Hobbs, Jerry R.
;
Appelt, Douglas E.
;
Bear, John
...
In: DTIC AND NTIS (1991)
BASE
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1317
BBN HARC and DELPHI Results on the ATIS Benchmarks - February 1991
Austin, S.
;
Ayuso, D.
;
Bates, M.
...
In: DTIC (1991)
BASE
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1318
Preparing a Sublanguage Grammar
Perzanowski, Dennis
;
Marsh, Elaine
In: DTIC AND NTIS (1991)
BASE
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1319
The Semantic Analyzer.
In: DTIC AND NTIS (1991)
BASE
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1320
Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) Syntax and Semantics Summary
Mills, Michael T.
In: DTIC AND NTIS (1991)
BASE
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