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All fields Title Creator / Publisher Keyword Year AND OR AND NOT All fields Title Creator / Publisher Keyword Year AND OR AND NOT All fields Title Creator / Publisher Keyword Year AND OR AND NOT All fields Title Creator / Publisher Keyword Year AND OR AND NOT All fields Title Creator / Publisher Keyword Year Sort by creator [A → Z]' creator [Z → A]' publishing year ↑ (asc)' publishing year ↓ (desc)' title [A → Z]' title [Z → A]' Simple Search Page: 1 2 3 4 Hits 61 – 64 of 64 61 Problem and Motivation. The problem we consider here was asked by Alcatel Space Industry. Signals O. Amini; J-c. Bermond; F. Giroire... In: http://www.mpi-inf.mpg.de/~amini/Publications/ABG+.pdf BASE Show details 62 116 Thursday, March 15: Poster Abstracts Word-order uncertainty induces alternative, non-veridical structures in online comprehension Gabriel Doyle; San Diego In: http://cuny2012.commons.gc.cuny.edu/files/2012/03/cuny2012_116.pdf BASE Show details 63 Standard Gotchas Subtleties in the Verilog and SystemVerilog Standards That Every Engineer Should Know Stuart Sutherland; Don Mills In: http://www.lcdm-eng.com/Verilog%20Gotchas%20Part1.pdf Abstract: A definition of “gotcha ” is: “A misfeature of.a programming language.that tends to breed bugs or mistakes because it is both enticingly easy to invoke and completely unexpected and/or unreasonable in its outcome. A classic gotcha in C is the fact that ‘if (a=b) {code;} ’ is syntactically valid and sometimes even correct. It puts the value of b into a and then executes code if a is non-zero. What the programmer probably meant was ‘if (a==b) {code;}’, which executes code if a and b are equal. ” (from Keyword: 2.3 Escaped identifiers in hierarchy paths. URL: http://www.lcdm-eng.com/Verilog%20Gotchas%20Part1.pdf http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.174.5961 BASE Hide details 64 Supporting SAT based BMC on Finite Path Models Daniel Geist; Mark Ginzburg; Yoad Lustig... In: http://www.cs.tau.ac.il/research/ohad.shacham/docs/ENTCS05II.pdf BASE Show details Page: 1 2 3 4

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