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Flipping the Feedback: Formative Assessment in a Flipped Freshman Circuits Class
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In: Practical Assessment, Research, and Evaluation (2021)
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| 2 |
Risk analysis with a fuzzy-logic approach of a complex installation ...
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| 3 |
Fuzzy logic response to Young's modulus characterization of a flax-epoxy natural fiber composite
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| 4 |
Systematic Analysis of Unknown Integrated Circuits
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In: Doctoral (2009)
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| 5 |
Accurate Representation of Attenuation in Large-Signal Helix TWT Simulation Codes
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In: DTIC (2008)
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| 6 |
Automated compiling targetting FPGAs ; Compilation automatique pour les FPGAs
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In: https://tel.archives-ouvertes.fr/tel-00807973 ; Performance et fiabilité [cs.PF]. Université Pierre et Marie Curie - Paris VI, 2007. Français. ⟨NNT : 2007PA066483⟩ (2007)
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| 7 |
Validation Studies for CHRISTINE-CC Using a Ka-Band Coupled-Cavity TWT
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In: DTIC (2006)
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| 8 |
The language X: circuits, computations and Classical Logic
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In: https://hal-lara.archives-ouvertes.fr/hal-02101957 ; [Research Report] LIP RR-2005-11, Laboratoire de l'informatique du parallélisme. 2005, 2+25p (2005)
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| 9 |
Architecture de l'ordinateur
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In: https://hal.archives-ouvertes.fr/hal-00338556 ; Dunod, pp.224, 2005, Sciences sup (2005)
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| 10 |
Production de la parole en présence de perturbations fonctionnelles, pathologiques ou artificielles.
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In: https://hal.archives-ouvertes.fr/hal-00003563 ; 2005 (2005)
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| 12 |
Data Repacking Circuit Having Toggle Buffer for Transferring Digital Data from P1Q1 Bus Width to P2Q2 Bus Width.
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In: DTIC AND NTIS (1996)
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| 13 |
System, Performance, and Applicability Assessment of a High-Performance Computer System.
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In: DTIC AND NTIS (1995)
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| 14 |
A Well-behaved Enumeration of Star Graphs
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In: Electrical and Computer Engineering Faculty Publications (1995)
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| 15 |
Research Laboratory of Electronic Progress Report Number 135.
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In: DTIC AND NTIS (1993)
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| 16 |
A Formal Description of the Incremental Translation of Stage 2 VHDL into State Deltas in the State Delta Verification System (SDVS)
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In: DTIC AND NTIS (1992)
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| 17 |
Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) Syntax and Semantics Summary
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In: DTIC AND NTIS (1991)
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| 18 |
Netlist +: A Simple Interface Language for Chip Design
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In: DTIC AND NTIS (1991)
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| 19 |
Global Optimization of Digital Circuits.
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In: DTIC AND NTIS (1991)
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| 20 |
Linear-time algorithms and non-monotonic reasoning in hierarchies ; Algorithmes linéaires et raisonnement non monotone dans des hiérarchies
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In: Cognitiva ; https://hal.archives-ouvertes.fr/hal-02142967 ; Cognitiva, Nov 1990, Madrid, Spain. pp.279-286 (1990)
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